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ASML eyes hybrid bonding, report finds, as Chinese firms adopt chip packaging technique

Dutch semiconductor equipment giant ASML is expanding into next-generation hybrid bonding, a technique that creates dense electrical connections by directly joining chips or silicon wafers, according to a new report. Major Chinese companies are also adopting the technology to improve chip performance. ASML submitted 27 patent families related to hybrid bonding tools between December 2022 and…

ASML eyes hybrid bonding, report finds, as Chinese firms adopt chip packaging technique

Dutch chipmaker ASML is exploring hybrid bonding technology, a method that directly fuses chips or silicon wafers for enhanced electrical connections, according to a new report. Chinese corporations are also adopting the technique to boost chip performance. ASML filed 27 patent families pertaining to hybrid bonding tools between December 2022 and November 2024, with the number potentially higher due to delayed filings, as reported by SemiAnalysis, a semiconductor and AI supply chain research firm.

The filings indicate ASML is transitioning from its lithography market, where it holds dominance, into back-end processes spurred by the surge in demand for high-performance chips driven by the AI boom. ASML is reportedly collaborating with Dutch tech firms Prodrive Technologies and VDL ETG to develop the architecture for hybrid bonders, leveraging its expertise in alignment accuracy and particle control, which are crucial for bonding yield.

Though ASML has not officially disclosed its advancements in advanced packaging, CEO Christophe Fouquet confirmed that the company continues to explore opportunities to assist customers in hybrid bonding. ASML stated to the South China Morning Post that it would assess the evolving 3D integration industry and identify how its expertise can add value to the roadmap.

Hybrid bonding enables ultra-high-density electrical connections and is considered a significant trend in chipmaking. Recent breakthroughs by Chinese firms Huawei Technologies and ChangXin Memory Technologies (CXMT) utilized the technique to enhance performance, as US-led export restrictions restricted access to advanced semiconductor equipment for Huawei and CXMT.

Hybrid bonding can lower thermal resistance in high-bandwidth memory (HBM) stacks by approximately 30%, potentially reducing cooling requirements and related investments. Huawei unveiled new details about its Kirin 9050 series, the first mass-produced chip using its LogicFolding architecture developed under the Tau Scaling Law, integrating more than 50 million hybrid bonds and increasing overall transistor density by 53.5%.

CXMT announced its latest "4F square" dynamic random-access memory architecture, which employs hybrid bonding, potentially enabling higher wafer bit density without relying on advanced EUV lithography. However, China's reliance on imported hybrid bonding equipment, particularly advanced machines, remains high, as domestic manufacturers are intensifying research and development to close the gap.

Piotech's hybrid bonding equipment generated 136 million yuan (US$20.3 million) in revenue in 2025, up 41.9% year-over-year, while Nomura analysts predicted Huawei's LogicFolding architecture could drive demand for bonding equipment, alongside Piotech's thin-film deposition tools.

Written by urgent.news from SCMP Tech's reporting — not their text. Machine-written — may contain errors; check the original before relying on it.

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