AMD's Zen 6 gaming CPUs might be absolute monsters by the looks of the server chips—and there's a 3D V-Cache variant to keep an eye on

AMD has unveiled new details on its upcoming Zen 6 CPU architecture, showcased through a technical deep dive into its new EPYC Venice server chips. These server chips reveal promising advancements for next-gen Ryzen desktop processors and potentially powerful gaming CPUs. One significant improvement in Zen 6 is the increased core count per chiplet, with a single Zen 6 CCD containing 12 performance cores and 4 MB of L3 cache per core.

This results in a total of 48 MB of L3 cache per CCD, a substantial increase compared to the 32 MB found on Zen 5 chips with eight cores. The upskilled core count per CCD means a 12-core Zen 6 chip would benefit from no performance penalty due to core communication. Additionally, the 3D V-Cache technology has been incorporated into the architecture, with one Venice chip called the Venice-X 9006X SP7 featuring 96 cores and 1152 MB of L3 cache, which breaks down to 144 MB of L3 cache per 12-core CCD.

The performance gains are expected to be substantial, potentially reaching above 6 GHz clock speeds and offering up to a 27% increase in instructions per clock (IPC) performance compared to Zen 5 in server workloads. However, exact release dates for the Ryzen desktop CPUs based on Zen 6 are still unknown, with the first half of 2027 being a likely timeframe.