AMD's Epyc X-chips are back after a three-year hiatus

After a three-year absence, AMD's Epyc X-chips are resurfacing in the form of Venice-X, which offers up to 96 cores and a quadrupled L3 cache density exceeding one gigabyte. However, the chips won't hit the market until the second half of 2027. These X-chips are primarily designed for latency-sensitive technical and scientific computing workloads such as computational fluid dynamics and electronic design automation (EDA).

AMD has incorporated 3D V-Cache chip stack technology to enhance the L3 cache, allowing CPU cores to access data quickly without waiting for data to move between system memory. This is particularly beneficial for demanding applications like EDA, where simulation and verification of silicon components are crucial. The SRAM tile, which AMD integrated into the chiplets to boost L3 cache capacity, has been placed at the bottom of the stack, enabling the chips to operate at higher clock speeds and sustain performance for longer durations.

This approach differs from previous generations, where a choice between large caches and high clock speeds was necessary.