Random access quantum memory lets one processor select among seven storage cells

Researchers at Stanford University, the University of Chicago, and SLAC National Accelerator Laboratory have developed a new device that could function as random access quantum memory for superconducting quantum computers. Unlike classical computers that use separate RAM for temporary data storage, most superconducting quantum computers integrate processors and memory components using the same hardware.

This design poses scalability challenges as each additional qubit requires its own control hardware, making scaling increasingly complex.

The Stanford team's proposed memory device consists of a transmon (a superconducting qubit for computing), a multimode aluminum cavity (supporting seven distinct storage modes or memory cells), a buffer cavity, and a tunable coupler for transferring quantum states between the buffer and the chosen memory cell. The buffer acts as a cache, allowing the transmon to operate on a selected memory cell without directly interacting with it, thus preserving the delicate quantum states.

By introducing this buffer layer, the researchers effectively isolate the transmon from the cumbersome microwave electronics and wiring typically required for individual qubits. This separation reduces parasitic interactions that can corrupt stored quantum information. In their prototype, the researchers found that each access operation introduced an average error of about 1.2% per memory mode, with unwanted interactions between the modes being a significant source of error.

The device enables rapid, on-demand access to multiple quantum memories from a single processor, potentially revolutionizing superconducting quantum computing architecture. With logical qubits accessible via a single transmon, the device could significantly reduce the need for control lines and enhance connectivity. The low error rates observed in testing suggest that, when used as the sole source of error, existing error-correction techniques could maintain the device's performance.

The researchers are optimistic about future improvements and anticipate that their work could contribute to more reliable quantum computers, which currently lack a dedicated memory component. By integrating a high-performance memory system, these advanced quantum computers could store information more efficiently, bridging the gap between theoretical quantum computing capabilities and practical, large-scale implementations.