SK hynix Turns to Optical Links to Break AI’s Data Bottleneck
As the computing performance of AI accelerators grows roughly threefold every two years, bandwidth between chips has increased by only about 1.4 times, making the so-called bandwidth wall an increasingly critical bottleneck in AI infrastructure.SK hynix is seeking to overcome that limitation with ne
SK hynix is tackling the bottlenecks in AI infrastructure by adopting next-generation optical interconnect technology that uses light instead of electrical signals to transfer data between chips. In a recent publication in the journal Nature Electronics, the company outlined its vision for co-packaged optics, or CPO, which integrates optical transceivers with processors to transmit data as light rather than relying solely on traditional electrical connections.
This approach aims to overcome the growing gap between the rapid growth of AI accelerator performance and the comparatively slower increase in bandwidth between chips. Traditional copper interconnects face limitations as transmission speeds increase and connection distances grow, leading to signal loss and higher power consumption.
By minimizing the distance electrical signals must travel, CPO technology could potentially boost data-transfer speeds and improve energy efficiency. The researchers who contributed to the paper, including SK hynix's Hong Seung-hoon and Professor Lee Kyu-sang from the University of Virginia, outlined specific performance targets for next-generation AI infrastructure.
These targets include bandwidth exceeding 100 terabits per second per node, energy consumption below 1 picojoule per bit, and chip-to-chip latency under 10 nanoseconds. The paper also maps out a technology roadmap spanning from two-dimensional packaging to three-dimensional heterogeneous integration, identifying key challenges that must be addressed for the technology to become commercially viable.
SK hynix's ultimate goal is to extend optical interconnect technology to memory interfaces, creating an "optics-centric architecture" that connects processors and memory directly through optical interposers. This could allow multiple AI accelerators to share vast memory resources, potentially expanding the role of memory companies in AI system design.
Lee emphasized the importance of optical transmission technology in overcoming the limitations of copper interconnects, especially as computing chips become more powerful. Hong highlighted the growing significance of optical interconnects as customers build larger AI systems and stressed the importance of open collaboration to strengthen system-level competitiveness.
As CPO-related technologies move from the laboratory to early stages of industrialization, SK hynix plans to accelerate the development of next-generation infrastructure solutions aimed at tackling data bottlenecks in massive AI clusters. This approach goes beyond performance improvements in individual memory products.
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