Alibaba's TSMC-Built 5nm RISC-V Chip, XuanTie C950, Now Runs Qwen-3.8 27B Model Natively, Unlocking Massive Vertical Integration Tailwinds

In a move echoing NVIDIA's vertically integrated strategy, Alibaba has integrated its proprietary XuanTie C950 RISC-V chip with Alibaba's Qwen-3.8 27B AI model, enabling the model to run natively on the chip. Alibaba unveiled the XuanTie C950 in March 2026, positioning it as a RISC-V-based solution for edge AI. Unlike traditional ASICs, the XuanTie C950 doesn't employ GPUs for AI tasks.

Instead, it is a high-performance server-grade 64-bit RISC-V processor, featuring 64 compute cores on a single silicon chip. The cores can operate at up to 3.20GHz, and multiple clusters, each containing 8 cores, can be connected using high-speed AMBA CHI fabrics. To tackle complex AI workloads, the chip incorporates matrix and vector acceleration engines, obviating the need for GPUs.

The XuanTie C950 features standard L1 caches, a customizable L2 cache, and supports an optional shared L3 cache to prevent communication bottlenecks between cores. It also uses hardware-level algorithms for intelligent data prefetching, loading memory strings into the cache hierarchy before the execution engine requests them. Alibaba has now enabled day-zero support for its latest Qwen-3.8 27B model on the XuanTie C950, achieving a decode speed of 30 tokens per second and a Time To First Token (TTFT) of just 1.9 seconds.

The Qwen-3.8 27B is a 27-billion-parameter open-weight AI model, comparable to Opus 4.5 in coding capabilities, and can run on a single MacBook. This integration aims to entice customers into Alibaba's ecosystem while expanding the compute options within Alibaba's data centers.