A 0.42-nanometer breakthrough could push transistors beyond silicon

Researchers at National Yang Ming Chiao Tung University (NYCU) and TSMC Corporate Research have unveiled a pivotal breakthrough that could pave the way for transistors to surpass the limitations of conventional silicon. By focusing on the interface between atomically thin semiconductors and their insulating gate dielectrics, the team has demonstrated a novel approach to shrinking these critical components without compromising performance.

Traditional transistor technology has long been reliant on silicon, with gate dielectrics serving as the insulating barrier between the gate electrode and the transistor channel. As transistors continue to shrink, the ability to create an exceptionally thin gate dielectric has become increasingly important for maintaining electrical control.

However, attempting to reduce the thickness of these dielectrics can disrupt the delicate interface between materials, scattering electrons and diminishing the very performance gains engineers strive to achieve.

In a groundbreaking study published in Nature Electronics, NYCU researchers introduced a new methodology centered on precisely engineering the atomic boundary between the semiconductor and its insulating layer. Rather than searching for a completely new semiconductor material, the team concentrated on optimizing the narrow region where the two materials meet, an area only a few atoms thick.

By carefully controlling this interface, the researchers were able to significantly thin the gate dielectric while preserving strong electrical performance. The key innovation involved placing an ultrathin epitaxial aluminum layer atop monolayer molybdenum disulfide (MoS2), followed by carefully oxidizing the aluminum to form a 0.42-nanometer-thick aluminum oxide layer.

This engineered interface then accommodated the deposition of a high-k hafnium oxide gate dielectric, which performed two essential functions: providing a uniform growth surface for the hafnium oxide and acting as an atomic buffer to minimize unwanted electrical interactions between the dielectric and the semiconductor.

The resulting transistor devices exhibited remarkable characteristics, including an equivalent oxide thickness of roughly one nanometer, low leakage current, minimal hysteresis, and maximum transconductance of 0.45 milliSiemens per micrometer. Crucially, the design achieved the simultaneous benefits of ultra-thin dielectric scaling, strong electrostatic control, and sustained carrier transport—features that have eluded researchers in the realm of atomically thin transistors.

The breakthrough hinges on the realization that interfaces separating different materials may be just as crucial as the materials themselves, particularly as transistors approach atomic dimensions. By optimizing these critical interfaces, the researchers have opened up new avenues for transistor design and development, potentially bringing atomically thin semiconductor technologies closer to practical wafer-scale manufacturing.