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Two-qubit entangling gate flags its own errors as detectable photon losses

Quantum errors are a normal part of quantum computing because fragile physical qubits (the tiny components storing data) can easily break down because of environmental noise, like heat, stray signals or microscopic vibrations. Typical fixes involve vast amounts of extra hardware qubits, which make computers larger, more expensive and harder to build.

Two-qubit entangling gate flags its own errors as detectable photon losses

Scientists from D-Wave Quantum Inc. have developed a two-qubit entangling gate that can detect and flag its own errors during quantum computations. This innovation could significantly improve the scalability and reliability of quantum computers by preserving the gate's error-detection abilities. Traditional quantum error correction methods often require additional hardware components, increasing the size, cost, and complexity of the computers.

The new ultrafast controlled-Z gate operates within 500 nanoseconds, entangling two qubits and automatically identifying most errors as photon losses, also known as erasures. This approach minimizes the occurrence of hidden glitches, which are mistakes that evade detection during computations. After testing the gate with random operations and analyzing the results, the researchers found that approximately 0.5% of operations resulted in detectable photon losses, while hidden errors remained below 0.1% per gate.

Bit-flip errors, which can cause significant issues in quantum calculations, were extremely rare, occurring at a rate of about 1 in 1 million. The team's findings demonstrate that the error hierarchy remains largely intact during the gate operation, ensuring most errors are flagged for correction. Although the control qubit experiences slightly more stress than the target qubit, simulations suggest that this trade-off could lead to more effective error suppression in larger quantum computers built using these qubits.

The researchers conclude that their results pave the way for faster development of error-corrected systems capable of rapidly suppressing errors as the computers scale up.

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