Show HN: Fursoy – Out-of-order RV64IMAFDV core in SystemVerilog (Linux 6.6)
The Fursoy S1 project, an out-of-order, RV64IMAFDV processor, has successfully bootstrapped Linux 6.6.50 along with the BusyBox userspace under Sv39 virtual memory. This SystemVerilog-based design incorporates Sv39 demand paging, privilege separation for machine, supervisor, and user modes, cycle-accurate hardware performance telemetry, and was synthesized using the Nangate 45nm standard-cell library, achieving a 500 MHz clock rate.
The processor, Fursoy Slice-1, is composed of eight functional blocks, each occupying 175,106.74 square micrometers in total standard-cell area. The total utilizes a NAND2_X1 gate size of 0.798 square micrometers.
In simulation, the system ran mainline Linux 6.6.50 without any kernel panics, oopses, or access faults for 89,861,075 cycles. This included 76,236,390 retired instructions, with 2,227,761 user mode commits and 2,255 demand page faults. The achieved instruction per cycle (IPC) rate is 0.84838, demonstrating near-perfect execution efficiency.
The process can be replicated with Yosys 0.33, sv2v v0.0.13, OpenSTA 3.1.0, and the Nangate45 library, licensed under the Apache License 2.0.
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