AMD’s Venice-X maxes out family at 5.3 GHz, returning 3D V-Cache to data center after four years
AMD's Venice-X CPUs launch in the second half of 2027, bringing 3D V-Cache back to the data center after four years on the sidelines.
AMD has reintroduced 3D V-Cache technology to the data center with its Venice-X CPUs, which have a maximum boost clock speed of 5.3 GHz, marking its return after a four-year absence from the industry. This marks the second appearance of 3D V-Cache for AMD following its debut with Milan-X in 2022. The Venice-X boasts 96 cores and 1,152 MB of L3 cache, similar to the Genoa-X, but with significantly higher clock speeds, PCIe 6.0, and more memory bandwidth.
The SP7 socket is utilized, similar to previous EPYC -X chips, and it supports 16-channel memory setups with MRDIMMs at 12,800 MT/s, providing up to 1.6 TB/s of per-socket memory bandwidth. AMD's Venetian fleet primarily utilizes 3D V-Cache and high-frequency EPYC chips to power its internal Electronic Design Automation (EDA) workloads, with the majority of the compute power dedicated to function verification tasks.
AMD plans to continue using MEXT, its AI-driven flash-as-DRAM technology, in conjunction with Venice-X to enhance memory capacity for EDA workloads. The Venice-X family of EPYC CPUs is set to launch in the second half of 2027.
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