From 10 µm to 3 nm: how chips got so small (and why 3 nm isn't 3 nm)
In 1971 Intel's first microprocessor, the 4004 , was built on a 10 micrometre process and held about 2,300 transistors . Today's leading chips are marketed as 3 nm and hold tens of billions of transistors. The largest packages pass 100 billion. Shrinking transistors lets you fit more onto the same silicon, which means more parallel work, more cache and more specialised hardware. The catch: "3 nm"…
From 1971 to today, semiconductor chips have shrunk dramatically, transitioning from a 10-micrometer process to the current 3-nanometer generation. The journey of shrinking transistors has enabled more powerful, energy-efficient, and specialized computing capabilities. However, the term "3 nm" is now a marketing label rather than an accurate measurement of physical dimensions.
Shrinking transistors has become increasingly challenging, as engineers face issues such as leakage, heat generation, and variations at the atomic scale. To overcome these challenges, the industry has continually innovated, developing new transistor architectures like FinFETs and gate-all-around structures, and employing advanced manufacturing techniques such as extreme ultraviolet lithography.
As a result, modern chips represent a far cry from their early 1970s counterparts, with modern fabrication processes and materials science enabling unprecedented levels of miniaturization and performance.
Written by urgent.news from Dev.to's reporting — not their text. Machine-written — may contain errors; check the original before relying on it.
