Samsung's archrival wants to spread 100 special CPUs in every SSD controller ahead of PCIe 8.0, High Bandwidth Flash onslaught

SK Hynix, a South Korean memory manufacturer, aims to integrate over 100 tiny processors in every solid-state drive (SSD) controller before the release of PCIe 8.0, according to a recent presentation at the International SoC Design Conference. These processors, known as H-TPUs (Hynix Transaction Processing Units), are designed to manage the increasing demands of data transfers in enterprise storage products and future memory systems handling demanding artificial intelligence workloads.

SK Hynix claims that its H-TPU architecture significantly reduces power consumption and chip area compared to conventional SSD controller designs, which rely on general-purpose CPUs that are nearing their limits in terms of power consumption and area. The company's H-TPUs can efficiently handle common input/output (I/O) transmission paths, separating repetitive operations from complex processing tasks.

Each H-TPU occupies only 4% of a general-purpose processor core's area and consumes about 2.5% of its power. The architecture employs a four-stage pipeline and sequential execution, which SK Hynix deems suitable for recurring storage operations. Instead of continuously activating all processors, the controller activates only the necessary units for each incoming request and puts the remaining processors into idle mode.

Conventional CPU cores are responsible for demanding functions such as error recovery, exception management, and storage policy decisions, while the H-TPUs handle routine work like data reading and writing, updating metadata, and controlling buffers. SK Hynix intends to incorporate H-TPUs into upcoming enterprise SSD controllers and its Storage Next architecture, as well as in its High Bandwidth Flash (HBF) memory technology, expected to hit the market next year.

The company has not disclosed the exact release date of H-TPUs in individual commercial products or their impact on overall SSD performance.