Analyzing Intel's EMIB and Foveros advanced packaging roadmaps

Intel's advanced packaging technologies, namely Embedded Multi-die Interconnect Bridge (EMIB) and Foveros, have become essential components of high-end client and data center CPUs. These technologies enable the creation of system-in-packages (SiPs) that are both cost-effective and capable of delivering enhanced performance and feature enhancements. In this analysis, we will delve into the current state of EMIB and Foveros and explore their future prospects.

EMIB, introduced in 2017, has evolved significantly since its inception. Initially, it was a simple method for connecting adjacent chiplets without the need for an expensive silicon interposer. However, it has since become a sophisticated technology utilized in data center processors and could potentially enable massive AI accelerators 12 times the size of a reticle with dozens of silicon bridges, more than 24 HBM stacks, and advanced power delivery.

The basic concept behind EMIB remains unchanged, with Intel embedding tiny silicon bridges into an organic package substrate to facilitate high-density die-to-die connectivity. Over time, Intel has reduced the first-layer-interconnect (FLI) bump pitch from 55 µm to 45 µm, and is now working on further reductions to around 36 µm and ultimately 25 µm.

This shrinkage in bump pitch will increase connection density along a chiplet's edge, known as the shoreline density. Intel is also adding functionality to the bridges themselves, such as metal-insulator-metal (MIM) capacitors in EMIB-M to improve power delivery and suppress voltage fluctuations, and through-silicon vias (TSVs) in EMIB-T to enable power to travel vertically through the bridge.

The EMIB roadmap includes EMIB 1st Gen, EMIB 2nd Gen, EMIB-M, EMIB-T, and EMIB-T evo. EMIB 1st Gen and EMIB 2nd Gen refer to the initial and second-generation implementations, while EMIB-M and EMIB-T represent the more advanced versions. EMIB-T evo is an evolutionary version of EMIB-T. As we look ahead, Intel plans to combine finer-pitch EMIB technology with glass-core substrates, which will offer better stability and reduced warpage compared to organic materials.

In summary, Intel's EMIB and Foveros technologies have progressed considerably since their introduction and continue to evolve to meet the demands of increasingly complex SiPs. With the development of EMIB-M, EMIB-T, and the potential integration of glass-core substrates, Intel is well-positioned to deliver cutting-edge packaging solutions for future products.