ASIL-D Zero-Heap RTOS: 8.7µs CAN-FD Latency with MPU FFI on HIL
Verifying No Interference in the AUTOSAR Base Without Memory for Electric Vehicles For a long time, I've been working on a challenge faced by many integrated electronics engineers: how can the absence of interference (FFI) between the QM and ASIL-D bands be proven when everything is running on a memory system with a fixed memory allocation? This is my approach, which has been practically tested…
A researcher has successfully demonstrated an interference-free system for electric vehicles by using a zero-heap memory architecture. This system, tested on the HV-CTRL-01 platform, achieved a minimum latency of 8.7 microseconds when transmitting CAN-FD messages.
The key to this achievement lies in the separation of quality management from the ASIL-D security level using a security device (Hardware Security Module). The system was divided into two domains: a security domain (ASIL-D) with Dual-Core Lockstep + BITE technology, and an isolated domain (QM) with a monitoring/broadcasting module. Both domains were protected using AUTOSAR technology and CRC checks for each frame.
The system's architecture ensures constant O(1) performance and eliminates the risk of memory fragmentation. The architecture was verified using real hardware in a HIL environment, not just simulations. A wet track test confirmed the system's stability, with a deviation rate of -0.42 radians/s and a stability ratio between 0.18 and 0.22.
The researcher emphasized the importance of this approach for electric vehicle platform development, advising against dynamic memory allocation and recommending a fixed allocation, frame-level protection, and separation of security levels. The findings were confirmed by real-world data, showing no memory fragments, and a stable trajectory on a wet track with a minimum CAN internet latency of 8.7 microseconds.
Written by urgent.news from Dev.to's reporting — not their text. Machine-written — may contain errors; check the original before relying on it.
