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Celero reels in $275M for its coherent digital signal processors

Celero Communications Inc., a startup that develops data center networking chips, today announced that it has raised $275 million in funding. The Series C round was led by Alphabet Inc.’s CapitalG fund, Atreides Management and Valor Equity Partners. Returning backers Sutter Hill Ventures and Maverick Silicon chipped in as well. Celero is now valued at […] The post Celero reels in $275M for its…

Celero reels in $275M for its coherent digital signal processors

Celero Communications Inc., a startup specializing in data center networking chips, has successfully raised $275 million in funding, bringing its valuation to an impressive $3 billion. The Series C round was led by Alphabet Inc.'s CapitalG fund, Atreides Management, and Valor Equity Partners, with Sutter Hill Ventures and Maverick Silicon also contributing.

The company's primary focus lies in developing coherent digital signal processors (DSPs) tailored for artificial intelligence workloads. These DSPs aim to provide lower latency and reduced power consumption compared to existing chips.

The funding will enable Celero to accelerate its product development and manufacturing roadmap. The company's technology is expected to enhance data center networks by managing transceivers more efficiently, reducing complexity, and maintaining network reliability. By generating timing information within the network itself without the need for additional hardware, Celero's coherent DSPs offer a more cost-effective and streamlined solution.

Moreover, these chips play a crucial role in ensuring data integrity within long-haul links and internal networks by extending data streams with error-correction bits.

Celero's innovative approach combines standard digital transistors with analog circuitry, allowing seamless integration with optical hardware. The company's latest achievement involves validating a version of its chip that utilizes a two-nanometer production process, the most advanced semiconductor manufacturing technology available.

This enhancement enables Celero's chips to support interconnects of up to 3.2 terabits of data per second per port, a significant leap forward in AI network capabilities. With this substantial investment, Celero is poised to lead the way in the next generation of AI networks, addressing the growing demands for higher bandwidth density, power efficiency, and scalability.

Written by urgent.news from SiliconANGLE's reporting — not their text. Machine-written — may contain errors; check the original before relying on it.

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