AMD Proposes New LLVM iTHP Option For Squeezing More Performance
AMD's compiler team is proposing a new LLVM Clang compiler option, -fenable-readonly-thp for implementing instruction Transparent Huge Pages "iTHP" at compile and link-time. With -fenable-readonly-thp, they are finding more performance out of SPEC CPU, Geekbench, and other workloads from the arranging of 2MB segment alignment at link time and allowing the executable text range can be promoted to…
AMD has introduced a new Clang feature, -fenable-readonly-thp, which enables Instruction Transparent Huge Pages (iTHP) at compile and link time. By aligning 2 MiB (or larger) segments at link time, linking a small startup object, and calling madvise(MADV_COLLAPSE) on the executable text range at process start, the kernel can promote default 4 KiB page mappings to huge pages.
This optimization can alleviate iTLB pressure from 4 KiB text mappings in large binaries with big instruction footprints, making it more suitable for production builds.
The company tested the performance uplift using SPEC CPU 2026, Geekbench, CPython, database/server workloads, and micro-architectural tests. The results showed workload-dependent gains, with the strongest performance improvements observed in large .text workloads, such as interpreters, simulators, and compiler-like binaries. In some cases, there were no noticeable changes in performance for other workloads, and no broad regressions were detected in the tests conducted.
Michael Larabel, the principal author of Phoronix.com and founder of the site in 2004, is credited with the proposal of this new LLVM iTHP option. Michael has been an influential figure in the Linux hardware community, having written over 20,000 articles on Linux hardware support, performance, graphics drivers, and other topics. He is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software.
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