Hot Chips 2026: Micron warns HBM wafer penalty is widening with every generation — AI memory uses 3x more silicon than DDR5, company says memory wall is 'getting worse' as prices rise
Micron Fellow Raghu Sreeramaneni told the Hot Chips 2026 conference that the silicon penalty HBM carries against DDR5 is growing with every generation.
Micron, in a presentation at the Hot Chips 2026 conference, warned that the silicon penalty associated with HBM when compared to DDR5 is increasing with each generation. HBM4 die carries roughly three times the wafer area of DDR5 for the same storage capacity, a trend that is worsening, according to Raghu Sreeramaneni, Micron's HBM Design Architecture Fellow.
He attributed this to the complexity of HBM, which makes up about 90% of the silicon in a two-GPU package and eight times the area of GPU dies. HBM's prices are five times those of DDR5 per bit, contributing to rising PC memory costs. In the first quarter of 2026, conventional DRAM contract prices rose 90% to 95% and another 58% to 63% in the second quarter.
This has led to mainstream 32GB DDR5-6000 kits selling for $392, up from $110 a year earlier, and 128GB DDR5 kits hitting $3,399, a 500% increase over 12 months. Despite a slight easing in Q3, the surge in prices continues due to memory's high profitability relative to server DRAM. Micron's presentation highlighted the challenges of stacking more layers of DRAM and managing heat generated by the memory stack. They expect HBM5 to introduce hybrid bonding technology, which is not expected before 2027.
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