Cadence AI cuts chip timelines
Cadence Design Systems, a San Jose-based company specializing in electronic design automation (EDA) software and hardware, has announced plans to expand its workforce in India. The company's senior vice-president and general manager, Paul Cunningham, believes that India can develop a domestic semiconductor startup ecosystem comparable to that of the US within the next decade.
Cunningham emphasized that the talent pool in India is phenomenal and that local teams are shaping the company's products and roadmaps. The company's AI AgentStack strategy includes several offerings such as ChipStack, InnerStack, Verisium, and AuraStack, which aim to automate chip design and verification tasks. While AI adoption in chip design is still early, Cadence has reported significant gains in productivity, with AI agents reducing tasks from five weeks to one week and day-long jobs to a few hours.
However, Cunningham cautioned that broad-scale adoption had not yet been achieved and that more work was needed to ensure predictable and reliable results. Despite increasing automation, Cadence is keeping engineers in the loop, with agents operating autonomously for short periods before checking back with users. The effectiveness of agents depends heavily on how clearly engineers define tasks, likening natural-language instructions to programming.
Over the next five years, Cunningham expects individual engineers to supervise teams of agents, highlighting the need for engineers to develop skills in managing and instructing AI systems.
Written by urgent.news from The Economic Times's reporting — not their text. Machine-written — may contain errors; check the original before relying on it.
Also reported by 1 other outlet
- Cadence AI cuts chip timelines economictimes.indiatimes.com