{
  "id": 6294485,
  "title": "ASML and TSMC want bigger masks for smaller chips",
  "url": "https://urgent.news/2026/09/08/asml-and-tsmc-want-bigger-masks-for-smaller-chips-6294485",
  "topic": "tech",
  "section": "Tech",
  "published": "2026-09-08T15:02:00.000Z",
  "source": {
    "name": "The Register Science",
    "slug": "the-register-science",
    "url": "https://www.theregister.com/systems/2026/09/08/asml-and-tsmc-want-bigger-masks-for-smaller-chips/5294982"
  },
  "original_language": "en",
  "account": "ASML, the leading manufacturer of EUV lithography systems, and chipmaker TSMC are jointly advocating for a shift to 12-inch photomasks in the industry. This transition could lower production costs and address certain limitations of high-NA EUV lithography. According to ASML, the collaboration with TSMC aims to establish a 12-inch mask pilot line by 2031, with supporting lithography systems ready for advanced node production by 2033. Currently, high-NA EUV will initially be introduced using the existing 6-inch masks, but the shift to larger masks could increase fab productivity and remove stitching constraints. ASML's decision to use anamorphic optics for its high-NA EUV machines, which reduces the mask pattern by 4x in one axis and 8x in the other, creates a half-sized exposure field compared to previous machines. This necessitates stitching patterns for large dies exceeding the exposure field, adding complexity and reducing productivity. By adopting 12-inch masks, the industry can restore the full exposure field, facilitating the production of denser, faster, and more energy-efficient chips. Both Intel Foundry and Samsung Electronics have voiced their support for the initiative. Intel Foundry is focused on enabling high-NA on 6-inch masks with or without stitching in the near term, while Samsung plans to be the first chipmaker to introduce ASML's high-NA EUV technology into high-volume DRAM manufacturing by 2028. The move towards larger masks is seen as a necessary step, similar to the industry's transition from 200 mm to 300 mm wafers, and requires broad industry participation to overcome the associated design and manufacturing challenges.",
  "summary": "Industry push aims to eliminate stitching constraints and ready high-NA EUV systems for production by 2033",
  "key_points": [],
  "editors_take": null,
  "illustration": null,
  "coverage": {
    "outlets": 2,
    "also_reported_by": [
      {
        "outlet": "The Register",
        "title": "ASML and TSMC want bigger masks for smaller chips",
        "url": "https://urgent.news/2026/09/08/asml-and-tsmc-want-bigger-masks-for-smaller-chips",
        "published": "2026-09-08T15:02:00.000Z"
      }
    ]
  },
  "ai_generated": true,
  "disclaimer": "Summaries, key points and the editor’s take are written by software from other outlets’ reporting and may contain errors — always check the linked original."
}