{
  "id": 3077140,
  "title": "IBM's first dual-ISA core natively executes ARM and z/Architecture in the same core; all cores run at 5.7 GHz base frequency — next-gen mainframe AI processor is built on 2nm node with 11 cores",
  "url": "https://urgent.news/2026/08/24/ibms-first-dual-isa-core-natively-executes-arm-and-z-architecture-in",
  "topic": "tech",
  "section": "Tech",
  "published": "2026-08-24T17:42:34.000Z",
  "source": {
    "name": "Tom's Hardware",
    "slug": "tom-s-hardware",
    "url": "https://www.tomshardware.com/pc-components/cpus/ibms-first-dual-isa-core-natively-executes-arm-and-z-architecture-in-the-same-core-all-cores-run-at-5-7-ghz-base-frequency-next-gen-mainframe-ai-processor-is-built-on-2nm-node-with-11-cores"
  },
  "original_language": "en",
  "account": "IBM has unveiled its first dual-ISA core processor that can natively execute both ARM and z/Architecture instructions within the same core. This innovative chip, developed in collaboration with Arm, is set to revolutionize IBM's mainframe AI processor with 11 high-performance cores built on a 2nm node and capable of operating at a base frequency of 5.7 GHz.\n\nThe processor, designed to work with the same ARM ecosystem software across IBM mainframes, promises to unify deployment by eliminating the need for separate Arm/x86 servers and z/Architecture mainframes. IBM utilizes the Linux Kernel-level Virtual Machine (KVM) for AArch64 instructions and bypasses KVM for z/Architecture instructions, ensuring high mainframe reliability.\n\nThe 11-core processor, integrated into the upcoming z18 mainframes, features larger caches (432 MB virtual L3 and 3.5 GB virtual L4) compared to IBM's current Telum II, and maintains the same on-chip DPU and hardware accelerators for AI, compression, and cryptography workloads. The processor supports simultaneous multithreading for both ISAs and offers comprehensive AArch64 v9.3 support with Scalable Vector Extension (SVE) capabilities, decoding 2,792 AArch64 instructions.\n\nIBM's next-gen AI accelerator, designed to complement the new processor, boasts 16 cores optimized for newer AI data formats and significantly higher memory bandwidth with 96 GB HBM3e. This move to HBM3e memory, replacing LPDDR5, promises a 20x increase in memory bandwidth, offering up to 4TB/s.",
  "summary": "IBM is vastly expanding softwarte support on its mainframes with its first dual-ISA CPU core that natively supports z/Architecture and ARM instructions.",
  "key_points": [],
  "editors_take": null,
  "illustration": null,
  "coverage": {
    "outlets": 1,
    "also_reported_by": []
  },
  "ai_generated": true,
  "disclaimer": "Summaries, key points and the editor’s take are written by software from other outlets’ reporting and may contain errors — always check the linked original."
}